Inter FPGA FIFO IP 核仿真

 打开对应的 Modelsim 软件，Change Directory 到.do文件所在目录，在Transcript窗口输入 do ****.do；

transcript on
if {[file exists rtl_work]} {
    vdel -lib rtl_work -all
}
vlib rtl_work
vmap work rtl_work

// TB文件或源文件的引用
vlog -vlog01compat -work work "F:/FPGA_Proj/****/HDL/****.v"


vsim -t 1ps -L lpm_ver -L altera_ver -L altera_mf_ver -L sgate_ver -L rtl_work -L work EthSwitch_TB

// 添加需要观察的信号
# add wave "EthSwitch_TB/*"
add wave -noupdate /EthSwitch_TB/clk100M
add wave -noupdate /EthSwitch_TB/rst_n
add wave -noupdate /EthSwitch_TB/spi_miso
add wave -noupdate /EthSwitch_TB/spi_clk_miso
add wave -noupdate /EthSwitch_TB/EthSwitch_u/SpiRx_u/spi_clk_miso_n
add wave -noupdate /EthSwitch_TB/o_s_tx_fifo_wr_en
add wave -noupdate /EthSwitch_TB/ov_s_tx_fifo_wr_data
add wave -noupdate /EthSwitch_TB/tx_fifo_wr_clk
add wave -noupdate /EthSwitch_TB/tx_fifo_wr_en
add wave -noupdate /EthSwitch_TB/tx_fifo_wr_data
add wave -noupdate /EthSwitch_TB/EthSwitch_u/rdusedw_spi_1
add wave -noupdate /EthSwitch_TB/EthSwitch_u/rdreq
add wave -noupdate /EthSwitch_TB/EthSwitch_u/current_state
add wave -noupdate /EthSwitch_TB/EthSwitch_u/spi_tx_en
add wave -noupdate /EthSwitch_TB/EthSwitch_u/spi_tx_data
add wave -noupdate /EthSwitch_TB/EthSwitch_u/spi_tx_ok
add wave -noupdate /EthSwitch_TB/EthSwitch_u/spi_rx_ok
add wave -noupdate /EthSwitch_TB/EthSwitch_u/SpiRx_u/current_state

view structure
view signals
run -all