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STM32的时钟系统RCC详细整理

程序员文章站 2024-02-25 18:30:15
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一、综述:

1、时钟源

 STM32 中,一共有 个时钟源,分别是 HSI  HSE  LSI  LSE  PLL 

 HSI 是高速内部时钟, RC 振荡器,频率为 8MHz 

 HSE 是高速外部时钟,可接石英 陶瓷谐振器,或者接外部时钟源,频率范围是 4MHz – 16MHz 

 LSI 是低速内部时钟, RC 振荡器,频率为 40KHz 

 LSE 是低速外部时钟,接频率为 32.768KHz 的石英晶体;

 PLL 为锁相环倍频输出,严格的来说并不算一个独立的时钟源, PLL 的输入可以接 HSI/2  HSE 或者 HSE/2 PLL倍频可选择为 2 – 16 ,但是其输出频率最大不得超过 72MHz 

其中, 40kHz  LSI 供独立看门狗 IWDG 使用,另外它还可以被选择为实时时钟 RTC 的时钟源。另外,实时时钟RTC 的时钟源还可以选择 LSE ,或者是 HSE  128 分频。

STM32 中有一个全速功能的 USB 模块,其串行接口引擎需要一个频率为 48MHz 的时钟源。该时钟源只能从 PLL 端获取,可以选择为 1.5 分频或者 1 分频,也就是,当需使用到 USB 模块时, PLL 必须使能,并且时钟配置为 48MHz 72MHz 

另外 STM32 还可以选择一个时钟信号输出到 MCO  (PA.8) 上,可以选择为 PLL 输出的 2 分频、 HSI  HSE或者系统时钟。

系统时钟 SYSCLK ,它是提供 STM32 中绝大部分部件工作的时钟源。系统时钟可以选择为 PLL 输出、 HSI HSE 。系系统时钟最大频率为 72MHz ,它通过 AHB 分频器分频后送给各个模块使用, AHB 分频器可以选择 1  2 4  8  16  64  128  256  512 分频AHB分频器输出的时钟送给 5 大模块使用:

       送给 AHB 总线、内核、内存和 DMA 使用的 HCLK 时钟;

       通过 8 分频后送给 Cortex 的系统定时器时钟STCLK

       直接送给 Cortex 的空闲运行时钟 FCLK 

       送给 APB1 分频器。 APB1 分频器可以选择 1  2  4  8  16 分频,其输出一路供 APB1 外设使用(PCLK1 最大频率 36MHz ),另一路送给定时器 (Timer)2  3  4 倍频器使用。该倍频器根据PCLK1的分频值自动选择 1 或者 2 倍频,时钟输出供定时器 2  3  4 使用。

       送给 APB2 分频器。 APB2 分频器可以选择 1  2  4  8  16 分频,其输出一路供 APB2 外设使用(PCLK2 ,最大频率 72MHz ),另外一路送给定时器 (Timer)1 倍频使用。该倍频器根据PCLK2的分频值自动选择1  2 倍频,时钟输出供定时器 1 使用。另外 APB2 分频器还有一路输出供 ADC 分频器使用,分频后送给 ADC 模块使用。 ADC 分频器可选择为 2  4  6  8 分频

需要注意的是定时器的倍频器,当 APB 的分频为 1 时,它的倍频值为 1 ,否则它的倍频值就为 2 

 STM32的时钟系统RCC详细整理

2APB1APB2连接的模块

①连接在 APB1( 低速外设 ) 上的设备有:电源接口、备份接口、 CAN  USB  I2C1  I2C2  UART2 UART3  SPI2 、窗口看门狗、 Timer2  Timer3  Timer4  注意 USB 模块虽然需要一个单独的 48MHz 的时钟信号,但是它应该不是供 USB 模块工作的时钟,而只是提供给串行接口引擎 (SIE) 使用的时钟。 USB 模块的工作时钟应该是由 APB1 提供的。

②连接在 APB2 (高速外设)上的设备有: UART1  SPI1  Timer1  ADC1  ADC2  GPIOx(PA~PE) 、第二功能 IO 口。

 STM32的时钟系统RCC详细整理

二、寄存器介绍:

typedef struct

{

  __IO uint32_t CR;

  __IO uint32_t CFGR;

  __IO uint32_t CIR;

  __IO uint32_t APB2RSTR;

  __IO uint32_t APB1RSTR;

  __IO uint32_t AHBENR;

  __IO uint32_t APB2ENR;

  __IO uint32_t APB1ENR;

  __IO uint32_t BDCR;

  __IO uint32_t CSR;

#ifdef STM32F10X_CL 

  __IO uint32_t AHBRSTR;

  __IO uint32_t CFGR2;

#endif /* STM32F10X_CL */

#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)  

  uint32_t RESERVED0;

  __IO uint32_t CFGR2;

#endif /* STM32F10X_LD_VL || STM32F10X_MD_VL || STM32F10X_HD_VL */

} RCC_TypeDef;

1、时钟控制寄存器(RCC_CR):(复位值为0x0000 xx83,内部低速时钟使能和就绪,内部时钟校准)

主要功能:内外部高速时钟的使能和就绪标志(含内部高速时钟校准调整),外部高速时钟旁路,时钟安全系统CSS使能,PLL使能和PLL就绪标志

2、时钟配置寄存器(RCC_CFGR):(复位值为0x0000 0000

主要功能:系统时钟源切换及状态,AHBAPB1APB2ADCUSB预分频PLL输入时钟源选择及HSE输入PLL分频选择PLL倍频系数MCOPA8)引脚微控制器时钟输出。

3、时钟中断寄存器 (RCC_CIR):(复位值: 0x0000 0000

主要功能:LSILSEHISHSEPLL就绪中断标志HSE时钟失效导致时钟安全系统中断标志,LSILSEHISHSEPLL就绪中断使能,清除LSILSEHISHSEPLL就绪中断,清除时钟安全系统中断。

4APB2外设复位寄存器 (RCC_APB2RSTR):(复位值: 0x0000 0000

主要功能:AFIOIOPAIOPBIOPCIOPDIOPEIOPFIOPGADC1ADC2TIM1SPI1TIM8USART1ADC3复位。

5APB1外设复位寄存器 (RCC_APB1RSTR) :(复位值: 0x0000 0000

主要功能:TIM2TIM3TIM4TIM5TIM6TIM7WWDGSPI2SPI3USART2USART3USART4USART5I2C1I2C2USBCANBKPPWRDAC复位。

6AHB外设时钟使能寄存器 (RCC_AHBENR) :(复位值: 0x0000 0014睡眠模式时SRAM、闪存接口电路时钟开启)

主要功能:DMA1DMA2SRAMFLITFCRCFSMCSDIO时钟使能

7APB2外设时钟使能寄存器(RCC_APB2ENR) :(复位值: 0x0000 0000

主要功能:AFIOIOPAIOPBIOPCIOPDIOPEIOPFIOPGADC1ADC2TIM1SPI1TIM8USART1ADC3时钟使能

8APB1外设时钟使能寄存器(RCC_APB1ENR) :(复位值: 0x0000 0000

主要功能:TIM2TIM3TIM4TIM5TIM6TIM7WWDGSPI2SPI3USART2USART3USART4USART5I2C1I2C2USBCANBKPPWRDAC时钟使能

9、备份域控制寄存器 (RCC_BDCR) :(复位值: 0x0000 0000

主要功能:外部低速振荡器使能和就绪标志及旁路、RTC时钟源选择和时钟使能、备份域软件复位。

10、控制/状态寄存器 (RCC_CSR) :(复位值: 0x0C00 0000 NRST引脚复位标志、上电/掉电复位标志)

主要功能:内部低速振荡器就绪、清除复位标志、NRST引脚复位标志、上电/掉电复位标志、软件复位标志、独立看门狗复位标志、窗口看门狗复位标志、低功耗复位标志。

三、初始化设置

采用8MHz 外部HSE 时钟,在 MDK 编译平台中,程序的时钟设置参数流程如下:

     RCC 寄存器重新设置为默认值:RCC_DeInit();

    打开外部高速时钟晶振 HSE     RCC_HSEConfig(RCC_HSE_ON);

    等待外部高速时钟晶振工作:       HSEStartUpStatus = RCC_WaitForHSEStartUp();

    设置 AHB 时钟 (HCLK)           RCC_HCLKConfig(RCC_SYSCLK_Div1);

        设置APB 2时钟 (APB2)     RCC_PCLK2Config(RCC_HCLK_Div1);

        设置APB1 时钟 (APB1)     RCC_PCLK1Config(RCC_HCLK_Div2);

        设置 PLL        RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);

    打开 PLL                                   RCC_PLLCmd(ENABLE);

    等待 PLL 工作:    while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);

设置系统时钟:    RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

判断 PLL 是否是系统时钟:        while(RCC_GetSYSCLKSource() != 0x08);

1、使用库函数进行时钟系统初始化配置

void RCC_config()//如果外部晶振为8MPLLCLK=SYSCLK=72MHCLK=72M//P2CLK=72MP1CLK=36MADCCLK=36MUSBCLK=48MTIMCLK=72M

{

       ErrorStatus HSEStartUpStatus; // 定义错误状态变量

       RCC_DeInit();//RCC寄存器重新设置为默认值

       RCC_HSEConfig(RCC_HSE_ON); //打开外部高速时钟晶振

       HSEStartUpStatus = RCC_WaitForHSEStartUp();// 等待外部高速时钟晶振工作

       if(HSEStartUpStatus == SUCCESS)

       {

       RCC_HCLKConfig(RCC_SYSCLK_Div1);//设置AHB不分频,HCLK=SYSCLK

       RCC_PCLK2Config(RCC_HCLK_Div1);//设置APB2不分频,P2CLK=HCLK

       RCC_PCLK1Config(RCC_HCLK_Div2); //设置APB1 2分频,P1CLK=HCLK/2

       FLASH_SetLatency(FLASH_Latency_2);//设置FLASH代码延时

       FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);//使能预取指缓存

       RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);//设置PLL时钟源,

//外部时钟不分频,为HSE9倍频8MHz * 9 = 72MHz

       RCC_PLLCmd(ENABLE);//使能PLL

       while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);//等待PLL准备就绪

       RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);//设置PLL为系统时钟源

       while(RCC_GetSYSCLKSource() != 0x08);//判断PLL是否是系统时钟

       }

            /*RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOD, ENABLE); // 打开 PB  PD 用于点亮 LED */

}

2、使用寄存器进行RCC时钟初始化配置

void RCC_init(u8 PLL)//输入PLL的倍频值216倍频

//HCLK=PLLCLK=SYSCLK=P2CLK=P1CLK*2=ADCCLK*2=TIMCLK=USBCLK*2/3

{

       unsigned char temp=0;  

       //RCC_DeInit();              //RCC寄存器重新设置为默认值

       RCC->CR|=0x00010000;  //外部高速时钟使能HSEON

       while(!(RCC->CR>>17));//等待外部时钟就绪

       RCC->CFGR=0X00000400; //APB1=DIV2;APB2=DIV1;AHB=DIV1;

       PLL-=2;//抵消2个单位

       RCC->CFGR|=PLL<<18;   //设置PLL倍频值 2~16

       RCC->CFGR|=1<<16;     //PLL时钟源选择

       FLASH->ACR|=0x32;     //FLASH 2个延时周期

       RCC->CR|=0x01000000;  //PLLON

       while(!(RCC->CR>>25));//等待PLL锁定

       RCC->CFGR|=0x00000002;//PLL作为系统时钟      

       while(temp!=0x02)     //等待PLL作为系统时钟设置成功

       {  

              temp=RCC->CFGR>>2;

              temp&=0x03;

       }   

}

四、相关库函数解析

1、库中所涉及到的结构体

typedef struct

{

  uint32_t SYSCLK_Frequency;  /*!< returns SYSCLK clock frequency expressed in Hz */

  uint32_t HCLK_Frequency;    /*!< returns HCLK clock frequency expressed in Hz */

  uint32_t PCLK1_Frequency;   /*!< returns PCLK1 clock frequency expressed in Hz */

  uint32_t PCLK2_Frequency;   /*!< returns PCLK2 clock frequency expressed in Hz */

  uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */

}RCC_ClocksTypeDef;

2、库函数解析

void RCC_DeInit(void);//将外设RCC寄存器设为缺省值;(除RCC_BDCRRCC_CSR

void RCC_HSEConfig(uint32_t RCC_HSE);//设置外部高速晶振(HSE);

//输入:RCC_HSE_OFFRCC_HSE_ONRCC_HSE_Bypass(HSE旁路)

ErrorStatus RCC_WaitForHSEStartUp(void);//等待HSE起振;

//返回值:SUCCESS,HSE晶振稳定且就绪;ERRORHSE晶振未就绪

void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);//调整内部高速晶振(HSI)校准值

//输入:校准补偿值(该参数取值必须在00x1F之间)

void RCC_HSICmd(FunctionalState NewState);//使能或者失能内部高速晶振(HSI

//输入:ENABLE或者DISABLE(如果HSI被用于系统时钟,或者FLASH编写操作进行中,那么它不能被停振)

void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul);//设置PLL时钟源及倍频系数

//输入:RCC_PLLSource_HSI_Div2RCC_PLLSource_HSE_Div1RCC_PLLSource_HSE_Div2

//输入:RCC_PLLMul_2RCC_PLLMul_16

void RCC_PLLCmd(FunctionalState NewState);// 使能或者失能PLL

//输入:ENABLE或者DISABLE

#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL)

 void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div);//

#endif

#ifdef  STM32F10X_CL

 void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div);//

 void RCC_PLL2Config(uint32_t RCC_PLL2Mul);//

 void RCC_PLL2Cmd(FunctionalState NewState);//

 void RCC_PLL3Config(uint32_t RCC_PLL3Mul);//

 void RCC_PLL3Cmd(FunctionalState NewState);//

#endif /* STM32F10X_CL */

void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);//设置系统时钟(SYSCLK)

// RCC_SYSCLKSource_HSIRCC_SYSCLKSource_HSERCC_SYSCLKSource_PLLCLK

uint8_t RCC_GetSYSCLKSource(void);// 返回用作系统时钟的时钟源

//返回值:0x00 HSI作为系统时钟,0x04 HSE作为系统时钟,0x08 PLL作为系统时钟

void RCC_HCLKConfig(uint32_t RCC_SYSCLK);//设置AHB时钟(HCLK

//输入:RCC_SYSCLK_Div1RCC_SYSCLK_Div2RCC_SYSCLK_Div4RCC_SYSCLK_Div8RCC_SYSCLK_Div16

//RCC_SYSCLK_Div32RCC_SYSCLK_Div64RCC_SYSCLK_Div128RCC_SYSCLK_Div256RCC_SYSCLK_Div512

void RCC_PCLK1Config(uint32_t RCC_HCLK);// 设置低速AHB时钟(PCLK1

//输入: RCC_HCLK_Div1, RCC_HCLK_Div2, RCC_HCLK_Div4, RCC_HCLK_Div8, RCC_HCLK_Div16

void RCC_PCLK2Config(uint32_t RCC_HCLK);// 设置高速AHB时钟(PCLK2

//输入:RCC_HCLK_Div1, RCC_HCLK_Div2, RCC_HCLK_Div4, RCC_HCLK_Div8, RCC_HCLK_Div16

void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);// 使能或者失能指定的RCC中断

//输入:RCC_IT_LSIRDY  LSI就绪中断->ENABLE或者DISABLE

//RCC_IT_LSERDY  LSE就绪中断,RCC_IT_HSIRDY  HSI就绪中断

//RCC_IT_HSERDY  HSE就绪中断,RCC_IT_PLLRDY  PLL就绪中断

#ifndef STM32F10X_CL

 void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource);// 设置USB时钟(USBCLK

//输入:RCC_USBCLKSource_PLLCLK_1Div5USB时钟 = PLL时钟除以1.5

RCC_USBCLKSource_PLLCLK_Div1USB时钟 = PLL时钟

#else

 void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource);//

#endif /* STM32F10X_CL */

void RCC_ADCCLKConfig(uint32_t RCC_PCLK2);// 设置ADC时钟(ADCCLK

//RCC_PCLK2_Div2,ADC时钟 = PCLK / 2;RCC_PCLK2_Div4,ADC时钟 = PCLK / 4;

//RCC_PCLK2_Div6,ADC时钟 = PCLK / 6;RCC_PCLK2_Div8,ADC时钟 = PCLK / 8

#ifdef STM32F10X_CL

 void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource); //                                

 void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource);//

#endif /* STM32F10X_CL */

void RCC_LSEConfig(uint8_t RCC_LSE);// 设置外部低速晶振(LSE

//输入:RCC_LSE_OFF,LSE晶振OFF;RCC_LSE_ON,LSE晶振ON;

//RCC_LSE_Bypass,LSE晶振被外部时钟旁路

void RCC_LSICmd(FunctionalState NewState);// 使能或者失能内部低速晶振(LSI

//输入:ENABLE或者DISABLE   (IWDG运行的话,LSI不能被失能)

void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);//设置RTC时钟(RTCCLK)(RTC时钟一经选定即不能更改,除非复位后备域)

//输入:RCC_RTCCLKSource_LSE,选择LSE作为RTC时钟;RCC_RTCCLKSource_LSI,选择LSI作为RTC时钟;RCC_RTCCLKSource_HSE_Div128,选择HSE时钟频率除以128作为RTC时钟

void RCC_RTCCLKCmd(FunctionalState NewState);// 使能或者失能RTC时钟

//输入:ENABLE或者DISABLE

void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);// 返回时钟的频率

//输入:指向结构RCC_ClocksTypeDef的指针,包含了各个时钟的频率(单位为Hz

void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);// 使能或者失能AHB外设时钟

//输入:RCC_AHBPeriph_DMADMA时钟->ENABLE或者DISABLE

//RCC_AHBPeriph_SRAMSRAM时钟;RCC_AHBPeriph_FLITFFLITF时钟

//RCC_AHBPeriph_DMA1DMA1时钟;RCC_AHBPeriph_DMA2DMA2时钟

//RCC_AHBPeriph_CRCCRC时钟;RCC_AHBPeriph_FSMCFSMC时钟

//RCC_AHBPeriph_SDIOSDIO时钟

void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);// 使能或者失能APB2外设时钟

//输入:RCC_APB2Periph_AFIO,功能复用IO时钟->ENABLE或者DISABLE

//RCC_APB2Periph_GPIOAGPIOA时钟;RCC_APB2Periph_GPIOB,GPIOB时钟;

//RCC_APB2Periph_GPIOC,GPIOC时钟;RCC_APB2Periph_GPIOD,GPIOD时钟;

//RCC_APB2Periph_GPIOE,GPIOE时钟;RCC_APB2Periph_ADC1,ADC1时钟;

//RCC_APB2Periph_ADC2,ADC2时钟;RCC_APB2Periph_TIM1,TIM1时钟;

//RCC_APB2Periph_SPI1,SPI1时钟;RCC_APB2Periph_USART1,USART1时钟;

//RCC_APB2Periph_ALL,全部APB2外设时钟

void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);// 使能或者失能APB1外设时钟

//输入:RCC_APB1Periph_TIM2TIM2时钟->ENABLE或者DISABLE;

//RCC_APB1Periph_TIM3,TIM3时钟;RCC_APB1Periph_TIM4,TIM4时钟

//RCC_APB1Periph_WWDG,WWDG时钟;RCC_APB1Periph_SPI2,SPI2时钟

//RCC_APB1Periph_USART2,USART2时钟;RCC_APB1Periph_USART3,USART3时钟

//RCC_APB1Periph_I2C1,I2C1时钟;RCC_APB1Periph_I2C2,I2C2时钟

//RCC_APB1Periph_USB,USB时钟;RCC_APB1Periph_CAN,CAN时钟

//RCC_APB1Periph_BKP,BKP时钟;RCC_APB1Periph_PWR,PWR时钟

//RCC_APB1Periph_ALL,全部APB1外设时钟

#ifdef STM32F10X_CL

void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);//

#endif /* STM32F10X_CL */

void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);// 强制或者释放高速APBAPB2)外设复位

//输入:同void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);函数的值

void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);// 强制或者释放低速APBAPB1)外设复位

//输入:同void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);函数的值

//例:/* Enter the SPI1 peripheral to reset */

//RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);

/* Exit the SPI1 peripheral from reset */

//RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);

void RCC_BackupResetCmd(FunctionalState NewState);// 强制或者释放后备域复位

void RCC_ClockSecuritySystemCmd(FunctionalState NewState);//使能或者失能时钟安全系统

//输入:ENABLE或者DISABLE

void RCC_MCOConfig(uint8_t RCC_MCO);// 选择在MCO管脚上输出的时钟源

//输入:RCC_MCO_NoClock 无时钟被选中 ;RCC_MCO_SYSCLK 选中系统时钟;

//RCC_MCO_HSI 选中HSI RCC_MCO_HSE 选中HSE 

//RCC_MCO_PLLCLK_Div2 选中PLL时钟除以2

//警告:当选中系统时钟作为MCO管脚的输出时,注意它的时钟频率不超过50MHz(最大I/O速率)

FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);// 检查指定的RCC标志位设置与否

//输入:待检查的RCC标志位


//RCC_FLAG_HSIRDY HSI晶振就绪RCC_FLAG_HSERDY HSE晶振就绪;

//RCC_FLAG_PLLRDY PLL就绪RCC_FLAG_LSERDY LSI晶振就绪;

//RCC_FLAG_LSIRDY LSE晶振就绪RCC_FLAG_PINRST 管脚复位 ;

//RCC_FLAG_PORRST POR/PDR复位RCC_FLAG_SFTRST 软件复位 ;

//RCC_FLAG_IWDGRST IWDG复位RCC_FLAG_WWDGRST WWDG复位;

//RCC_FLAG_LPWRRST 低功耗复位

//返回值:RCC_FLAG的新状态(SET或者RESET

//例:/* Test if the PLL clock is ready or not */

//FlagStatus Status;

//Status = RCC_GetFlagStatus(RCC_FLAG_PLLRDY);

//if(Status == RESET)

//{

//...

//}

//else

void RCC_ClearFlag(void);// 清除RCC的复位标志位

//(可以清除的复位标志位有:RCC_FLAG_PINRST, RCC_FLAG_PORRST, //RCC_FLAG_SFTRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST)

ITStatus RCC_GetITStatus(uint8_t RCC_IT);// 检查指定的RCC中断发生与否

//输入:RCC_IT_LSIRDYLSI晶振就绪中断;RCC_IT_LSERDYLSE晶振就绪中断

//RCC_IT_HSIRDYHSI晶振就绪中断;RCC_IT_HSERDYHSE晶振就绪中断

//RCC_IT_PLLRDYPLL就绪中断;RCC_IT_CSS,时钟安全系统中断

//返回值:RCC_IT的新状态

//例:

/* Test if the PLL Ready interrupt has occurred or not */

//ITStatus Status;

//Status = RCC_GetITStatus(RCC_IT_PLLRDY);

//if(Status == RESET)

//{

//...

//}

//else

//{

//...

//}

void RCC_ClearITPendingBit(uint8_t RCC_IT);// 清除RCC的中断待处理位

//RCC_IT_LSIRDY,LSI晶振就绪中断;RCC_IT_LSERDY,LSE晶振就绪中断

//RCC_IT_HSIRDY,HSI晶振就绪中断;RCC_IT_HSERDY,HSE晶振就绪中断

//RCC_IT_PLLRDY,PLL就绪中断;RCC_IT_CSS,时钟安全系统中断

五、实例详解

#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)//如果定义了这些系统时钟将设为24M,如果没有定义则为72M
/* #define SYSCLK_FREQ_HSE    HSE_VALUE */
 #define SYSCLK_FREQ_24MHz  24000000
#else
/* #define SYSCLK_FREQ_HSE    HSE_VALUE */
/* #define SYSCLK_FREQ_24MHz  24000000 */ 
/* #define SYSCLK_FREQ_36MHz  36000000 */
/* #define SYSCLK_FREQ_48MHz  48000000 */
/* #define SYSCLK_FREQ_56MHz  56000000 */
#define SYSCLK_FREQ_72MHz  72000000      //
系统时钟默认值的定义 ,如果没有定义外部高速时钟则用内部高速时钟,为8000000

/*只需修改以上几句就可以自动设置使用外部倍频作为系统时钟,如果以上宏都未定义则在下边把内部高速时钟作为系统时钟*/
#endif

/*!< Uncomment the following line if you need to use external SRAM mounted
     on STM3210E-EVAL board (STM32 High density and XL-density devices) or on 
     STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ 
#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)//
内外部SRAM选择
/* #define DATA_IN_ExtSRAM */
#endif

/*!< Uncomment the following line if you need to relocate your vector Table in
     Internal SRAM. */ 
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field. //
向量表的基址偏移量
                                  This value must be a multiple of 0x100. */


/*******************************************************************************
*  Clock Definitions;
以下为把系统时钟的定义值传给系统内核时钟变量,如果没有定义外部高速时钟则用内部高速时钟,为8M
*******************************************************************************/
#ifdef SYSCLK_FREQ_HSE
  uint32_t SystemCoreClock         = SYSCLK_FREQ_HSE;        /*!< System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_24MHz
  uint32_t SystemCoreClock         = SYSCLK_FREQ_24MHz;        /*!< System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_36MHz
  uint32_t SystemCoreClock         = SYSCLK_FREQ_36MHz;        /*!< System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_48MHz
  uint32_t SystemCoreClock         = SYSCLK_FREQ_48MHz;        /*!< System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_56MHz
  uint32_t SystemCoreClock         = SYSCLK_FREQ_56MHz;        /*!< System Clock Frequency (Core Clock) */
#elif defined SYSCLK_FREQ_72MHz
  uint32_t SystemCoreClock         = SYSCLK_FREQ_72MHz;        /*!< System Clock Frequency (Core Clock) */
#else /*!< HSI Selected as System Clock source */
  uint32_t SystemCoreClock         = HSI_VALUE;        /*!< System Clock Frequency (Core Clock) 
如果没有定义外部高速时钟则用内部高速时钟,为8000000*/
#endif

__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};//AHB配方表
/**
  * @}
  */

/** @addtogroup STM32F10x_System_Private_FunctionPrototypes
  * @{
  */
/*********************************************************************************
               
以下为函数声明
*********************************************************************************/
static void SetSysClock(void); //
设置系统时钟的函数声明
//
以下为根据不同的系统时钟的定义来声明用到的相应的函数,为后面的函数调用做好准备
#ifdef SYSCLK_FREQ_HSE
  static void SetSysClockToHSE(void);
#elif defined SYSCLK_FREQ_24MHz
  static void SetSysClockTo24(void);
#elif defined SYSCLK_FREQ_36MHz
  static void SetSysClockTo36(void);
#elif defined SYSCLK_FREQ_48MHz
  static void SetSysClockTo48(void);
#elif defined SYSCLK_FREQ_56MHz
  static void SetSysClockTo56(void);  
#elif defined SYSCLK_FREQ_72MHz
  static void SetSysClockTo72(void);
#endif

#ifdef DATA_IN_ExtSRAM //外部SRAM选择后的初始化函数声明
  static void SystemInit_ExtMemCtl(void); 
#endif /* DATA_IN_ExtSRAM */

/**
  * @}
  */

/** @addtogroup STM32F10x_System_Private_Functions
  * @{
  */

/**
  * @brief  Setup the microcontroller system
  *         Initialize the Embedded Flash Interface, the PLL and update the 
  *         SystemCoreClock variable.
  * @note   This function should be used only after reset.
  * @param  None
  * @retval None
  */
void SystemInit (void)//
系统初始化函数,设置系统的时钟及时钟中断(在startup_stm32f10x_md.s中调用)(复位RCC时钟配置为默认状态,直到设置时钟函数)
{
  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= (uint32_t)0x00000001; //
内部高速时钟使能,内部8MHz时钟开启

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#ifndef STM32F10X_CL
  RCC->CFGR &= (uint32_t)0xF8FF0000;//MCO
微控制器没有时钟输出(对外部引脚),ADC预分频PCLK2 2分频后作为ADC时钟,APB预分频HCLK不分频,AHB预分频SYSCLK不分频,HSI作为系统时钟
                                    //HSI
作为系统时钟输出(已输出),SYSCLK=PCLK=PCLK1=PCLK2=8MADCCLK=1/2(PCLK2)=4M
#else
  RCC->CFGR &= (uint32_t)0xF0FF0000;//
同上;RCC->CFGR27位为保留位始终为HSI作为系统时钟输出(未输出原因为未编译)
#endif /* STM32F10X_CL */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= (uint32_t)0xFEF6FFFF;//
时钟监测器关闭,HSE振荡器关闭

  /* Reset HSEBYP bit */
  RCC->CR &= (uint32_t)0xFFFBFFFF;//
外部4-25MHz振荡器没有旁路

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= (uint32_t)0xFF80FFFF; //PLL
时钟1.5倍分频作为USB时钟,PLL 2倍频输出,HSE不分频,HSI时钟2分频后作为PLL输入时钟
                                     //PLLCLK=HSICLK=8M
(还未输出),HSECLK=HSEOSC,USBCLK=PLLCLK/1.5 ,除PLL外其他分频系数都为0
#ifdef STM32F10X_CL
  /* Reset PLL2ON and PLL3ON bits */
  RCC->CR &= (uint32_t)0xEBFFFFFF;//CR
中的2628位置0

  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x00FF0000;//
清除中断标志,关闭一些中断

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000; //
没有此寄存器
#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000;//
清除中断标志,关闭一些中断

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000; //
没有此寄存器     
#else
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000; //
清除中断标志,关闭一些中断
#endif /* STM32F10X_CL */
    
#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
  #ifdef DATA_IN_ExtSRAM
    SystemInit_ExtMemCtl();//
如果宏定义了外部SRAM则对其初始化控制
  #endif /* DATA_IN_ExtSRAM */
#endif

  /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
  /* Configure the Flash Latency cycles and enable prefetch buffer */
  SetSysClock();//
设置系统时钟

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. 
向量表放在内部SRAM*/
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. 
向量表放在内部flash*/
#endif 
}

/**
  * @brief  Update SystemCoreClock according to Clock Register Values
  * @note   None
  * @param  None
  * @retval None
  */
void SystemCoreClockUpdate (void)
{
  uint32_t tmp = 0, pllmull = 0, pllsource = 0;

#ifdef  STM32F10X_CL
  uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0;
#endif /* STM32F10X_CL */

#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
  uint32_t prediv1factor = 0;
#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */
    
  /* Get SYSCLK source -------------------------------------------------------*/
  tmp = RCC->CFGR & RCC_CFGR_SWS;
  
  switch (tmp)
  {
    case 0x00:  /* HSI used as system clock */
      SystemCoreClock = HSI_VALUE;
      break;
    case 0x04:  /* HSE used as system clock */
      SystemCoreClock = HSE_VALUE;
      break;
    case 0x08:  /* PLL used as system clock */

      /* Get PLL clock source and multiplication factor ----------------------*/
      pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
      pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
      
#ifndef STM32F10X_CL      
      pllmull = ( pllmull >> 18) + 2;
      
      if (pllsource == 0x00)
      {
        /* HSI oscillator clock divided by 2 selected as PLL clock entry */
        SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
      }
      else
      {
 #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
       prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
       /* HSE oscillator clock selected as PREDIV1 clock entry */
       SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; 
 #else
        /* HSE selected as PLL clock entry */
        if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
        {/* HSE oscillator clock divided by 2 */
          SystemCoreClock = (HSE_VALUE >> 1) * pllmull;
        }
        else
        {
          SystemCoreClock = HSE_VALUE * pllmull;
        }
 #endif
      }
#else
      pllmull = pllmull >> 18;
      
      if (pllmull != 0x0D)
      {
         pllmull += 2;
      }
      else
      { /* PLL multiplication factor = PLL input clock * 6.5 */
        pllmull = 13 / 2; 
      }
            
      if (pllsource == 0x00)
      {
        /* HSI oscillator clock divided by 2 selected as PLL clock entry */
        SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
      }
      else
      {/* PREDIV1 selected as PLL clock entry */
        
        /* Get PREDIV1 clock source and division factor */
        prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
        prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
        
        if (prediv1source == 0)
        { 
          /* HSE oscillator clock selected as PREDIV1 clock entry */
          SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;          
        }
        else
        {/* PLL2 clock selected as PREDIV1 clock entry */
          
          /* Get PREDIV2 division factor and PLL2 multiplication factor */
          prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1;
          pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; 
          SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;                         
        }
      }
#endif /* STM32F10X_CL */ 
      break;

    default:
      SystemCoreClock = HSI_VALUE;
      break;
  }
  
  /* Compute HCLK clock frequency ----------------*/
  /* Get HCLK prescaler */
  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
  /* HCLK clock frequency */
  SystemCoreClock >>= tmp;  
}

/**
  * @brief  Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers.
  * @param  None
  * @retval None
  */
static void SetSysClock(void)//
根据不同的宏定义,设置不同的系统时钟
{  
#ifdef SYSCLK_FREQ_HSE
  SetSysClockToHSE();
#elif defined SYSCLK_FREQ_24MHz
  SetSysClockTo24();
#elif defined SYSCLK_FREQ_36MHz
  SetSysClockTo36();
#elif defined SYSCLK_FREQ_48MHz
  SetSysClockTo48();
#elif defined SYSCLK_FREQ_56MHz
  SetSysClockTo56();  
#elif defined SYSCLK_FREQ_72MHz
  SetSysClockTo72(); 
#endif
 
 /* If none of the define above is enabled, the HSI is used as System clock
    source (default after reset) */ 
}

/**
  * @brief  Setup the external memory controller. Called in startup_stm32f10x.s 
  *          before jump to __main
  * @param  None
  * @retval None
  */ 
#ifdef DATA_IN_ExtSRAM
/**
  * @brief  Setup the external memory controller. 
  *         Called in startup_stm32f10x_xx.s/.c before jump to main.
  *        This function configures the external SRAM mounted on STM3210E-EVAL
  *         board (STM32 High density devices). This SRAM will be used as program
  *         data memory (including heap and stack).
  * @param  None
  * @retval None
  */ 
void SystemInit_ExtMemCtl(void) 
{
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is 
  required, then adjust the Register Addresses */

  /* Enable FSMC clock */
  RCC->AHBENR = 0x00000114;
  
  /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */  
  RCC->APB2ENR = 0x000001E0;
  
/* ---------------  SRAM Data lines, NOE and NWE configuration ---------------*/
/*----------------  SRAM Address lines configuration -------------------------*/
/*----------------  NOE and NWE configuration --------------------------------*/  
/*----------------  NE3 configuration ----------------------------------------*/
/*----------------  NBL0, NBL1 configuration ---------------------------------*/
  
  GPIOD->CRL = 0x44BB44BB;  
  GPIOD->CRH = 0xBBBBBBBB;

  GPIOE->CRL = 0xB44444BB;  
  GPIOE->CRH = 0xBBBBBBBB;

  GPIOF->CRL = 0x44BBBBBB;  
  GPIOF->CRH = 0xBBBB4444;

  GPIOG->CRL = 0x44BBBBBB;  
  GPIOG->CRH = 0x44444B44;
   
/*----------------  FSMC Configuration ---------------------------------------*/  
/*----------------  Enable FSMC Bank1_SRAM Bank ------------------------------*/
  
  FSMC_Bank1->BTCR[4] = 0x00001011;
  FSMC_Bank1->BTCR[5] = 0x00000200;
}
#endif /* DATA_IN_ExtSRAM */

#ifdef SYSCLK_FREQ_HSE
/**
  * @brief  Selects HSE as System clock source and configure HCLK, PCLK2
  *          and PCLK1 prescalers.
  * @note   This function should be used only after reset.
  * @param  None
  * @retval None
  */
static void SetSysClockToHSE(void)
{
  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
  
  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
  /* Enable HSE */    
  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
 
  /* Wait till HSE is ready and if Time out is reached exit */
  do
  {
    HSEStatus = RCC->CR & RCC_CR_HSERDY;
    StartUpCounter++;  
  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));

  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
  {
    HSEStatus = (uint32_t)0x01;
  }
  else
  {
    HSEStatus = (uint32_t)0x00;
  } 

  if (HSEStatus == (uint32_t)0x01)
  {

#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL
    /* Enable Prefetch Buffer */
    FLASH->ACR |= FLASH_ACR_PRFTBE;

    /* Flash 0 wait state */
    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);

#ifndef STM32F10X_CL
    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
#else
    if (HSE_VALUE <= 24000000)
 {
      FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
 }
 else
 {
      FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
 }
#endif /* STM32F10X_CL */
#endif
 
    /* HCLK = SYSCLK */
    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
      
    /* PCLK2 = HCLK */
    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
    
    /* PCLK1 = HCLK */
    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
    
    /* Select HSE as system clock source */
    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE;   

    /* Wait till HSE is used as system clock source */
    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04)
    {
    }
  }
  else
  { /* If HSE fails to start-up, the application will have wrong clock 
         configuration. User can add here some code to deal with this error */
  }  
}
#elif defined SYSCLK_FREQ_24MHz

static void SetSysClockTo72(void)//系统时钟设置为72MSYSCLK=72MHCLK=72MPCLK1=36M(最高36M),PCLK2=72MADCCLK=36M,
{
  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;//
启动计数,HSE状态
  
  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
  /* Enable HSE */    
  RCC->CR |= ((uint32_t)RCC_CR_HSEON);//HSE
使能
 
  /* Wait till HSE is ready and if Time out is reached exit */
  do //
循环,直到HSE使能成功或者超时
  {
    HSEStatus = RCC->CR & RCC_CR_HSERDY;
    StartUpCounter++;  
  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));

  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
  {
    HSEStatus = (uint32_t)0x01;//HSE
使能成功
  }
  else
  {
    HSEStatus = (uint32_t)0x00;//HSE
使能不成功
  } 

  if (HSEStatus == (uint32_t)0x01)//HSE使能成功
  {
    /* Enable Prefetch Buffer */
    FLASH->ACR |= FLASH_ACR_PRFTBE;//flash
缓存使能

    /* Flash 2 wait state */
    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);//
    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;//   

 
    /* HCLK = SYSCLK */
    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;//RCC_CFGR_HPRE_DIV1=0
CFGR中的值不变
      
    /* PCLK2 = HCLK */
    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;//RCC_CFGR_PPRE2_DIV1=0
CFGR中的值不变
    
    /* PCLK1 = HCLK/2 */
    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;//
低速APB预分频把HCLK 2分频,APB1CLK=HCLK/2

#ifdef STM32F10X_CL
    /* Configure PLLs ------------------------------------------------------*/
    /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
    /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */
        
    RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
                              RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
                             RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
  
    /* Enable PLL2 */
    RCC->CR |= RCC_CR_PLL2ON;
    /* Wait till PLL2 is ready */
    while((RCC->CR & RCC_CR_PLL2RDY) == 0)
    {
    }
    
   
    /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ 
    RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
                            RCC_CFGR_PLLMULL9); 
#else    
    /*  PLL configuration: PLLCLK = HSE * 9 = 72 MHz */
    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |  //PLL
输入时钟源HSI时钟2分频后作为PLL输入时钟,HSE分频器作为PLL输入HSE不分频 
                                        RCC_CFGR_PLLMULL)); //PLL
倍频系数PLL 2倍频输出(为了清零其他位)
    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);//PLL
输入时钟源HSE时钟作为PLL输入时钟,PLL倍频系数PLL 9倍频输出 
#endif /* STM32F10X_CL */

    /* Enable PLL */
    RCC->CR |= RCC_CR_PLLON; //PLL
使能

    /* Wait till PLL is ready */
    while((RCC->CR & RCC_CR_PLLRDY) == 0)//
等待PLL使能成功
    {
    }
    
    /* Select PLL as system clock source */
    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));//HSI
作为系统时钟(为了清零其他位)
    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; //PLL
输出作为系统时钟  

    /* Wait till PLL is used as system clock source */
    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)//
等待直到PLL成功用作系统时钟源
    {
    }
  }
  else
  { /* If HSE fails to start-up, the application will have wrong clock 
         configuration. User can add here some code to deal with this error */
  }
}
#endif