基于HAL库的FMC驱动SRAM(IS62WV51216)
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2024-02-23 16:09:46
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原理图
根据原理图配置cubeMX 的 FMC
配置完后生成hal库代码。FMC接口有A\B\C\D四种控制模式,具体区别可以参考添加链接描述。驱动SRAM只需要选择模式A。
在模式A下,需要关心地址的建立时间和数据的建立时间。cubeMX生成的相关代码在FMC.C文件的Timing结构体中。
/* Timing*/
/*This configuration is at system clock bit 80Mhz*/
Timing.AddressSetupTime = 5;
Timing.AddressHoldTime = 15; /* Min value, Don't care on SRAM Access mode A */
Timing.DataSetupTime = 3;
Timing.BusTurnAroundDuration = 1;
Timing.CLKDivision = 16; /* Min value, Don't care on SRAM Access mode A */
Timing.DataLatency = 17; /* Min value, Don't care on SRAM Access mode A */
Timing.AccessMode = FMC_ACCESS_MODE_A;
在cubeMX中配置的时序在此结构体中。
操作内存我们还需要了解FMC的地址映射如下图
在地址空间0x6000 0000h到9FFF FFFFh间的变量为外部RAM的寻址范围
。在0x6000 0000h到9FFF FFFFh中又分为4个256M大小的4个bank。用于驱动不同的存储器。此项目中我们用的bank1的第3区。外部SRAM的寻址是0x6800 0000~0x6BFF FFFF.
在main.h添加枚举
typedef enum {FAILED = 0, PASSED = 1} TestStatus;
```c
bsp.h
```c
#ifndef BSP_SRAM_H_
#define BSP_SRAM_H_
#include "main.h"
#define SRAM_BANK_ADDR ((uint32_t)0x68000000)
#define BUFFER_SIZE ((uint32_t)0x0100)
#define WRITE_READ_ADDR ((uint32_t)0x0800)
static void Fill_Buffer(uint16_t *pBuffer, uint32_t uwBufferLenght, uint16_t uwOffset);
static TestStatus Buffercmp(uint16_t *pBuffer1, uint16_t *pBuffer2, uint16_t BufferLength);
void FMC_SRAM_WriteBuffer(uint8_t* pBuffer,uint32_t WriteAddr,uint32_t n);
void FMC_SRAM_ReadBuffer(uint8_t* pBuffer,uint32_t ReadAddr,uint32_t n);
__IO uint32_t FMC_SRAM_Test(void);
#endif
bsp.c
#include "bsp_sram.h"
/**
* @brief Fills buffer with user predefined data.
* @param pBuffer: pointer on the buffer to fill
* @param uwBufferLength: size of the buffer to fill
* @param uwOffset: first value to fill on the buffer
* @retval None
*/
static void Fill_Buffer(uint16_t *pBuffer, uint32_t uwBufferLength, uint16_t uwOffset)
{
uint16_t tmpIndex = 0;
/* Put in global buffer different values */
for (tmpIndex = 0; tmpIndex < uwBufferLength; tmpIndex++)
{
pBuffer[tmpIndex] = tmpIndex + uwOffset;
}
}
/**
* @brief Compares two buffers.
* @param pBuffer1, pBuffer2: buffers to be compared.
* @param BufferLength: buffer's length
* @retval PASSED: pBuffer identical to pBuffer1
* FAILED: pBuffer differs from pBuffer1
*/
static TestStatus Buffercmp(uint16_t *pBuffer1, uint16_t *pBuffer2, uint16_t BufferLength)
{
while (BufferLength--)
{
if (*pBuffer1 != *pBuffer2)
{
return FAILED;
}
pBuffer1++;
pBuffer2++;
}
return PASSED;
}
/**
* @brief Writes n bytes in succession, starting at the specified address.
* @param pBuffer: pointer on the buffer to load
* @param WriteAddr: The address to write
*/
void FMC_SRAM_WriteBuffer(uint8_t* pBuffer,uint32_t WriteAddr,uint32_t n)
{
for(;n!=0;n--)
{
*(__IO uint8_t*)(SRAM_BANK_ADDR+WriteAddr)=*pBuffer;
WriteAddr++;
pBuffer++;
}
}
/**
* @brief Reading n bytes in succession, starting at the specified address.
* @param pBuffer: pointer on the buffer to fill
* @param ReadAddr: The address to read
* @param n:Length of reading
*/
void FMC_SRAM_ReadBuffer(uint8_t* pBuffer,uint32_t ReadAddr,uint32_t n)
{
for(;n!=0;n--)
{
*pBuffer++=*(__IO uint8_t*)(SRAM_BANK_ADDR+ReadAddr);
ReadAddr++;
}
}
__IO uint32_t FMC_SRAM_Test(void)
{
uint32_t uwIndex = 0;
__IO uint32_t uwWriteReadStatus = 0;
uint16_t aTxBuffer[BUFFER_SIZE];
uint16_t aRxBuffer[BUFFER_SIZE];
Fill_Buffer(aTxBuffer, BUFFER_SIZE, 0xC20F);
/* Write data to the SRAM memory */
for(uwIndex = 0; uwIndex < BUFFER_SIZE; uwIndex++)
{
*(__IO uint16_t *)(SRAM_BANK_ADDR + WRITE_READ_ADDR + 2 * uwIndex) = aTxBuffer[uwIndex];
}
/* Read back data from the SRAM memory */
for(uwIndex = 0; uwIndex < BUFFER_SIZE; uwIndex++)
{
aRxBuffer[uwIndex] = *(__IO uint16_t *)(SRAM_BANK_ADDR + WRITE_READ_ADDR + 2 * uwIndex);
}
/*##-3- Checking data integrity ############################################*/
uwWriteReadStatus = Buffercmp(aTxBuffer, aRxBuffer, BUFFER_SIZE);
return uwWriteReadStatus;
}
此项目的硬件平台为STM32L471ZE