JTAG Boundary Scan
JTAG( JOINT Test Action Group),联合测试行动组。
标准的JTAG接口是4线——TMS、TCK、TDI、TDO,分别为模式选择、时钟、数据输入和数据输出线。
JTAG的主要功能有两种,或者说JTAG主要有两大类:
- 一类用于测试芯片的电气特性,检测芯片是否有问题;
- 另一类用于Debug,对各类芯片以及其外围设备进行调试;一个含有JTAGDebug接口模块的CPU,只要时钟正常,就可以通过JTAG接口访问CPU的内部寄存器、挂在CPU总线上的设备以及内置模块的寄存器。
本文主要介绍的是检测芯片
边界扫描
边界扫描(Boundary-Scan)技术的基本思想是在靠近芯片的输入/输出引脚上增加一个移位寄存器单元,也就是边界扫描寄存器(Boundary-ScanRegister)。
当芯片处于调试状态时,边界扫描寄存器可以将芯片和外围的输入/输出隔离开来。通过边界扫描寄存器单元,可以实现对芯片输入/输出信号的观察和控制。对 于芯片的输入引脚,可以通过与之相连的边界扫描寄存器单元把信号(数据)加载到该引脚中去;对于芯片的输出引脚,也可以通过与之相连的边界扫描寄存器“捕 获”该引脚上的输出信号。在正常的运行状态下,边界扫描寄存器对芯片来说是透明的,所以正常的运行不会受到任何影响。这样,边界扫描寄存器提供了一种便捷 的方式用于观测和控制所需调试的芯片。另外,芯片输入/输出引脚上的边界扫描(移位)寄存器单元可以相互连接起来,在芯片的周围形成一个边界扫描链 (Boundary-ScanChain)。边界扫描链可以串行地输入和输出,通过相应的时钟信号和控制信号,就可以方便地观察和控制处在调试状态下的芯片。
Example:
我们用XMC-JLINK来烧写XMC Mcu,发现SWD模式下正常,但是在JTAG模式下会提示连接不上。我们就此问题展开讨论。
Reference Manual
28.4.4 Timestamping
A 48-bit timestamping capability is required by the debug system in order to get accurate
correlation between the ETM trace and trace data from ITM and DWT. This is also
named global timestamping. Timestamp packets encode timestamp information, generic
control and synchronization information. The Timestamp counter is a free running global
counter.
A synchronization packet is a timestamp packet control. It is emitted at each DWT trigger
(DWT must be configured to trigger the ITM).
28.4.5 Debug tool interface access (SWJ-DP)
Debug capabilities can be accessed by a debug tool via Serial Wire (SW) or JTAG
interface (JTAG - Debug Port). By default, the JTAG interface is active. The User might
switch to SW interface as the full JTAG pins are not available to the user. To enable SW
interface a dedicated JTAG sequence on TMS/SWDIO and TCK/SWCLK is required to
to switch to the Serial Wire Debug interface. A successful sequence disables JTAG
interface and enables SW interface.
The sequences to do this are described in Section 28.4.5.1 and Section 28.4.5.2
28.4.5.1 Switch from JTAG to SWD
The sequence for switching from JTAG to SWD is:
• Send 50 or more TCK cycles with TMS = 1
• Send the 16-bit sequence on TMS = 1110011110011110 (0xE79E LSB first)
• Send 50 or more TCK cycles with TMS = 1
28.4.5.2 Switch from SWD to JTAG
The sequence for switching from SWD to JTAG is:
• Send 50 or more TCK cycles with TMS = 1
• Send the 16-bit sequence on TMS = 1110011100111100 (0xE73C LSB first)
• Send 50 or more TCK cycles with TMS = 1
由此可见,跟TMS的sequence关系。
题外话:
typedef uint8_t u8_t;
typedef int8_t i8_t;
typedef uint16_t u16_t;
typedef int16_t i16_t;
typedef uint32_t u32_t;
typedef int32_t i32_t;
typedef uint64_t u64_t;
typedef int64_t i64_t;
typedef float f32_t;
typedef double f64_t;
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef int int16_t;
typedef unsigned int uint16_t;
typedef long int32_t;
typedef unsigned long uint32_t;
typedef long long int64_t;
typedef unsigned long long uint64_t;
char /unsigned char: %c
int : %d
unsigned int: %u
long: %ld;
unsigned long:%lu
long long: %lld(%l64d)
unsigned long long:%Ilu(%l64u)